1. Field of the Invention
The present invention relates to a wide band gap semiconductor device such as a metal-oxide-semiconductor field-effect transistor (MOSFET) for forming an inverter device and the like.
2. Description of the Background Art
As an example of a wide band gap semiconductor device, a MOSFET including a SiC wafer for the material (hereinafter, referred to as a SiC-MOSFET) is configured of a plurality of unit cells disposed in the same chip.
Here, the wide band gap semiconductor is generally a semiconductor having a forbidden band width of approximately 2 eV or more. It is known as a group III-nitride represented by GaN, a group II-nitride represented by ZnO, a group II-chalcogenide represented by ZnSe, a SiC and the like.
In a case of a SiC-MOSFET compared to a MOSFET including a Si wafer (hereinafter, referred to as a Si-MOSFET), a drop in a forward voltage (on-voltage) between a drain electrode and a source electrode can be reduced more. Thus, the number of unit cells can be reduced, so that a chip size can be shrunk (see Japanese Patent Application Laid-Open No. 2012-54378).
As described above, in the SiC-MOSFET compared to a Si-MOSFET, the chip size can be shrunk more. However, on the other hand, the capacity between the gate electrode and the source electrode is reduced, and the electrostatic breakdown resistance between the gate electrode and the source electrode is decreased.
In many cases of the Si-MOSFET, as a measure against a general electrostatic breakdown, a pn junction is formed on polysilicon (Poly-Si) to contain zener diode with a use of a source process (n-type diffusion layer formation) and a P+ diffusion process (p-type diffusion layer formation) during a unit cell formation.
In the SiC-MOSFET, to activate a p-type impurity and a n-type impurity, a heat treatment at temperatures of 1500° C. or more needs to be performed in a wafer process. In general, prior to a step of forming polysilicon, ion-implantation of the p-type impurity and the n-type impurity is performed.
For this reason, to contain the zener diode in the SiC-MOSFET, during the wafer process step, the pn junction needs to be formed in a step other than the unit cell formation, and costs for processing chips increase, thereby increasing the chip costs.